Analysis Using Decapsulation – How To Perform Failure Analysis Using Decapsulation

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Failure analysis using decapsulation occupies a prominent position among failure analysis techniques for integrated circuits. However, a engineer must use caution in using decapsulation as it will render the package useless and other techniques useless as well. In that sense, failure analysis using decapsulation belongs after microscopy or radiography so that the testers know which decapsulation technique to use. Decapsulation refers to taking an integrated circuit apart to examine the components. Taking the package apart may destroy parts of the package that require inspection. So, analysis using decapsulation means already knowing what to examine.

Decapsulation will use any of several means to open the package. These range from simply prying the substrates apart to laser or jet etching. Some IC decapsulation processes call for subjecting the package to heat and then grinding the components apart. This technique will destroy bond wires but preserve the die, whereas the etching processes (laser etching, manual etching or jet etching) will usually destroy the die. Analysis using decapsulation by means of manual etching subjects the package to corrosive acids to remove the plastic material that covers the die. Various acids may be used in this process and sometimes the acid is applied to the package. In other processes, the package may actually be submerged in an acidic bath. But in any case, the acid will burn off the plastic and enable examination of the package’s internals after careful drying is completed.

A more precise form of failure analysis using decapsulation is jet etching. In this process, a jet etcher emits acid at that portion of the package to be removed while the rest is protected by a shield. Failure analysis using decapsulation by jet etching is less messy and more efficient, but still renders the package unusable.

Thomas Paquette is the founder and president of Insight Analytical Labs, an electrical engineering firm offering electronic failure analysis to the semiconductor and printed circuit board (PCB) industries. Tom is an expert at assessing new integrated circuit (IC) technologies, implementing failure analysis solutions, improving board-level reliability and supporting IC development efforts. Visit Tom’s website to receive a free consultation.


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